|
|
樓主 |
發表於 2014-10-26 21:43:15
|
顯示全部樓層
冇clock input~ 佢個設計係唔跟9018的datasheet上的佈局(其他dac都不居其九都係照跟datasheet佈局設計), 所以佢個clock係唔可以改. 而如果佢官網冇吹水的話, 已經冇咩必要用external clock.
The INVICTA Clock Architecture
The internal time control of an audio DAC is critical to the quality of the audio signal. Imperfections in the time of events in the system translate to perceptible artifacts in the sound stage. Here is what one of our senior engineers had to say in response to a CUSTOMER question:
The clocking in the MIRUS is the same as the INVICTA, it uses a 50MHz CCHD-950. The reason 50MHz was chosen is in Audio its important to have the lower phase noise in the Audio Band which is 20Hz to 20kHz. Notice how the CCHD-950 50MHz has –90dB at 10Hz!!! This is one of the key components in getting the great bass definition the INVICTA family has. The 44.1k and 48k clocks are derived from this same 50MHz clock using a PLL inside the FPGA. You would at first think the PLL is a bad way to do this, and normally it would be. The reason we do it this way is because we are referencing all the timing to the same 50MHz clock. The Sabre then uses the internal sample rate converter and BECAUSE all clocks are derived from 1 single source, the sample rate converter operates in a way when it mathematically removes ALL the jitter down to 0.001Hz or so. It is all about knowing how the clocking in the Sabre chip works that leads us to do this method, and it has paid off. The Audio resolution from the INVICTA family is amazing. |
|